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Quantum Chemical Simulation: The Next Generation

Quantum Molecular Interaction Analysis

Nano-scale Device Simulation

Fluid Dynamics Simulation: The Next Generation

Structural Analysis: The Next Generation

Platform of Problem Solving Environment

High-Performance Computing Middleware

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Collabolative Research Center of Frontier Simulation Software for Industrial ScienceInstitute of Industrial Science, University of Tokyo4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan

High-Performance Computing Middleware





Software
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HPC Middleware (HPC-MW)is an infrastructure for developing optimized and reliable scientific simulation codes effictivle
In order to develop this HPC-MW,various types of scientific simulation methods such as FEM,FDM,FVM,BEM,Spectral Methods,MD and Particle Methods etc.should be investigated,typical and common patterns for operations are extracted and each procedure will be optimized for various types of computers including vector/RISC processors,SMP parallel architectures and PC clusters.
Source codes developed on PC with single processor are easily optimized on massively parallel computers by plug-in the source codes to the HPC-MW installed on the target computers.This HPC-MW will provide dramatic efficiency,portability and reliability in development of scientific simulation code.For example,line number of the source codes is expected to be less than 1,000 and duration of the development will be as 10% as before.
Moreover,under GRID environment where various types of computers are connected through network,virtual petaflops environment can be attained by global operating system and HPC-MW which is optimized for each hardware.Thus very large-scale simulation using world-wide resources (computer hardware,code,observed/computed data sets etc.)is possible.



Image1
Performance of iterative methods for 3D linear- elastic applications by FEM (left:RISC processor,right:vector processor)


Image2
Domain partitioning for parallelcomputation.


Image3
Optimized parallel code is generated by special language/compiler based on analysis data and H/W information.


Image4
Library Type Approach:Optimized parallel code is automatically generated by just "plugging-in" the code into HPC-MW.

     






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